MV1FZ, stuck in watchdog, no SP1 /OE

hkz

Kuroko's Training Dummy
Joined
Jul 26, 2013
Posts
70
Greetings everyone, I got another dead MVS that is proving to be annoying to get running. Might have another dead custom IC on my hands, but I'd like a second opinion before I put this in the pile of scrap boards.

MV1FZ Motherboard, when powered up it shows bursts of random lines on the screen, with short intervals where a static screen with random characters appear for less than two seconds before going back to the garbage screen.

SP1 ROM never gets enabled: Pin 20 (/OE) is always high.

I then ran a check on NEO-C1:
- SROMOEL, SROMOEU: Always high
- A17, A18, A19, A20, A21: toggling
- A22I: low
- A23I: high
- LDS, UDS: Toggling
- RW: Toggling, but seems to toggle between HIGH and disconnected...

I moved to check NEO-E0, according to https://wiki.neogeodev.org/index.php?title=NEO-E0 I should have
- Pin 55 (A22I) following pin 53 (A22) if VEC is high
- Pin 56 (A23I) following pin 54 (A23) if VEC is high
What I actually see is:
- A22 and A23: toggling high and low in short busts
- A22I: low
- A23I: high
- VEC: low
So, with VEC low it is expected for A22I and A23I not to change.

VEC is generated by the HC259 latch at U7 (pin 5 / Q1), so checking on that:
- Pin 1,2,3 (the addresses for the latch) are toggling in short busts
- Pin 13 (data for the latch) is toggling
- Pin 15 (/MR, the reset for the latch) is toggling
- Pin 14 (/E, the enable for the latch) is always high. So the latch never gets enabled, thus VEC never goes high

Checking the schematics for the MV1F I see that the enable for the latch is connected to BITW1, pin 100 of the NEO-C1.
I have connectivity, and indeed pin 100 is always high. Sadly I can't see any explanation on how BITW1 signal is generated, so I'm left with my suspect that I have (another) dead NEO-C1 in my hands.

Different ideas/things to check are welcome!
 

hkz

Kuroko's Training Dummy
Joined
Jul 26, 2013
Posts
70
The more I look at the RW signal from the 68K, the weirder it looks: I checked it with a scope and it has a Vhi of around 5v, and that's fine, but a Vlo slightly short of 2v, which is a bit too high for my tastes. The other signals like UDS/LDS seems to reach 0 just fine with the low level.

I checked other signals from the CPU, and found at least VMA, FC2, FC1 and FC0 behaving with this weird high low level.
I also snipped RW and lifted it from the board to check if something was forcing it high, but no, it's actually the cpu outputting the signal that way. Hmm, maybe time to start searching for a spare 68k in my junk box.
 
Last edited:

hkz

Kuroko's Training Dummy
Joined
Jul 26, 2013
Posts
70
Hmmm, had time to replace the 68K. No change in behavior.
 

nikoskon

n00b
Joined
Jan 12, 2021
Posts
13
I feel your pain my friend.

I have a 1FZ also that doesn't want to work. Mine also has garbled graphics, add to that, the fix layer is all garbled too.

Like you, i have also swapped out the CPU, because mine keeps VPA & VMA high, and A16, A17 and A19 low. Both my other MVS's toggle these address lines.

I have a feeling, that like yours, there are multiple failures at play here. I have already found a failed CRE from player 1, and just found today, that the C! chip is faulty too (put it in a working 1FS and had all sorts of errors). In saying that, i think my boards main failure, is the LSPC2 chip.

I have replaced all logic chips, all RAM and even swapped out the SFIX rom, and still nothing.

Being that i don't have any other spare boards, the only thing i can do, is remove each of the custom chips from the 1FZ and install on the 1FS, to see what chips are faulty, but that is a big job, and not one i want to do just yet.

I hope that you find the issue with yours, no hope for mine, already spent too much time on it.

Good luck and let us know what you find.

Cheers
 

hkz

Kuroko's Training Dummy
Joined
Jul 26, 2013
Posts
70
I rebuilt the ROM mapping circuit on an external board according to this page: https://wiki.neogeodev.org/index.php?title=System_ROM_mapping_circuit
I then lifted the A23I A22I pins of NEO-E0 and fed my signals (which are toggling, differently from the ones generated by E0). Still no /OE on SP1:
Traced the issue to NEO-E0 again: the ANI0 and ANI1 inputs were toggling, but the AND0 output was fixed high: a sure sign of damage.
Again I lifted the AND0 pin and added an external AND port. Now I have /OE from SP1 toggling, and the board boots...somewhat.

Error on upper work RAM, it's unable to write to it. The reason is pretty clear: WRU/WWU and WRL/WWL from NEO-C1 are stuck high, so the RAM never gets enabled. Thus, I suspect that NEO-C1 too is dead.

For now I have:
- Dead NEO-E0
- Suspect NEO-C1
 
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