A pair of Puzzle de Pon! boots

WNivek

Overtop Pathfinder
Joined
Apr 5, 2016
Posts
104
I've come into possession of a pair of Puzzle de Pon! carts, which both appear - to my eye, at least - to be bootlegs.

The boards don't match what MVS Scans shows for Puzzle de Pon!, they house a mix of UV-erasable and one-time-programmable chips, and the few mask roms are from other games entirely.

If I'm right and these are bootlegs, I'm thinking of using one or both as sac carts for titles that don't have an official MVS release.
But, on the off-chance that someone else has something to add to stay my hand, I present the (poorly-lit) photos of my carts' boards.

Cart #1 (black shell, labeled パズルdeポン! but taped-over with PUZZLE DU PON):
Spoiler:
IMG_20160423_151625.jpg
Prog4096: (no leftover roms, but appears to match an Art of Fighting board)
Spoiler:
IMG_20160425_001709.jpg

Cha 42G-3: (w/ leftover Fatal Fury Special C-roms)
Spoiler:
IMG_20160425_001717.jpg
Note the C-rom configuration: 4x 4MBit chips, rather than 2x 8MBit. As configured, this board appears not to be addressing C-rom as intended; attempts to read the upper-half of PdP's C rom data instead read the lower-half again, introducing errors in various pieces of game text and some frames of the animation. The game's still quite playable, but it's clearly not 100% correct.

Cart #2 (clear shell, labeled パズルdeポン!)
Spoiler:
IMG_20160507_131225.jpg
Prog16: (w/ leftover Art Of Fighting V-rom)
Spoiler:
IMG_20160507_123207.jpg
Cha256: (w/ leftover Power Spikes II C-roms)
Spoiler:
IMG_20160507_123252.jpg
Note that while this board also opts for 4x 4MBit chips for its C-rom, the bootlegger appears to have kludged their own jumper setting, by wiring J5 to pin 1 on C6; the least significant address line outside the range of the 40-pin 4MBit chips. While I don't know much about the operation and configuration of these boards, my interpretation is that's trying to tie the chip selection logic to a low-enough bit of the addressing that C3 and C4 would be read at the appropriate address space. Whatever they did, though, it worked - this cart does not exhibit the graphical anomalies presented by the first one.
 

ResO

water damaged
20 Year Member
Joined
Jan 8, 2001
Posts
8,000
I've come into possession of a pair of Puzzle de Pon! carts, which both appear - to my eye, at least - to be bootlegs.

The boards don't match what MVS Scans shows for Puzzle de Pon!, they house a mix of UV-erasable and one-time-programmable chips, and the few mask roms are from other games entirely.

If I'm right and these are bootlegs, I'm thinking of using one or both as sac carts for titles that don't have an official MVS release.
But, on the off-chance that someone else has something to add to stay my hand, I present the (poorly-lit) photos of my carts' boards.

Cart #1 (black shell, labeled パズルdeポン! but taped-over with PUZZLE DU PON):
Spoiler:
IMG_20160423_151625.jpg
Prog4096: (no leftover roms, but appears to match an Art of Fighting board)
Spoiler:
IMG_20160425_001709.jpg

Cha 42G-3: (w/ leftover Fatal Fury Special C-roms)
Spoiler:
IMG_20160425_001717.jpg
Note the C-rom configuration: 4x 4MBit chips, rather than 2x 8MBit. As configured, this board appears not to be addressing C-rom as intended; attempts to read the upper-half of PdP's C rom data instead read the lower-half again, introducing errors in various pieces of game text and some frames of the animation. The game's still quite playable, but it's clearly not 100% correct.

Cart #2 (clear shell, labeled パズルdeポン!)
Spoiler:
IMG_20160507_131225.jpg
Prog16: (w/ leftover Art Of Fighting V-rom)
Spoiler:
IMG_20160507_123207.jpg
Cha256: (w/ leftover Power Spikes II C-roms)
Spoiler:
IMG_20160507_123252.jpg
Note that while this board also opts for 4x 4MBit chips for its C-rom, the bootlegger appears to have kludged their own jumper setting, by wiring J5 to pin 1 on C6; the least significant address line outside the range of the 40-pin 4MBit chips. While I don't know much about the operation and configuration of these boards, my interpretation is that's trying to tie the chip selection logic to a low-enough bit of the addressing that C3 and C4 would be read at the appropriate address space. Whatever they did, though, it worked - this cart does not exhibit the graphical anomalies presented by the first one.

Definitely conversion boots. Bummer. Sac em!
 
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